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1 lt3028 3028f dual 100ma/500ma low dropout, low noise, micropower regulators with independent inputs low noise: 20 v rms (10hz to 100khz) low quiescent current: 30 a/output independent inputs wide input voltage range: 1.8v to 20v output current: 100ma/500ma very low shutdown current: <0.1 a low dropout voltage: 300mv/320mv at100ma/500ma adjustable outputs from 1.22v to 20v stable with as low as 1 f/3.3 f output capacitor stable with aluminum, tantalum orceramic capacitors reverse-battery protected no protection diodes needed overcurrent and overtemperature protected tracking/sequencing capability thermally enhanced 16-lead tssop and 16-lead(5mm 3mm) dfn packages the lt 3028 is a dual, micropower, low noise, low drop- out regulator with independent inputs. with an external0.01 f bypass capacitor, output noise is a low 20 v rms over a 10hz to 100khz bandwidth. designed for use inbattery-powered systems, the low 30 a quiescent current per output makes it an ideal choice. in shutdown, quies-cent current drops to less than 0.1 a. shutdown control is independent for each output, allowing for flexibility inpower management. the device is capable of operating over an input voltage range of 1.8v to 20v. output 1 can supply 500ma of output current with a dropout voltage of 320mv. the device can supply 100ma of output current from output 2 with a dropout voltage of 300mv. quiescent current is well controlled in dropout. the lt3028 regulator is stable with output capacitors as low as 1 f for the 100ma output and 3.3 f for the 500ma output. small ceramic capacitors can be used without theseries resistance required by other regulators. internal protection circuitry includes reverse-battery pro- tection, current limiting and thermal limiting protection. the device is available as an adjustable device with a 1.22v reference voltage. the lt3028 regulator is available in the thermally enhanced 16-lead tssop and 16-lead, low profile (5mm 3mm 0.75mm) dfn packages. 10hz to 100khz output noise 3.3v/2.5v low noise regulators cellular phones pagers battery-powered systems frequency synthesizers wireless modems tracking/sequencing power supplies , ltc and lt are registered trademarks of linear technology corporation. v out 100 v/div 20 v rms 3028 ta01b 3.3v at 500ma20 v rms noise 249k 0.01 f 10 f 422k 3028 ta01a out2 2.5v at 100ma20 v rms noise adj2 byp2 gnd 249k 0.01 f 10 f 261k out1 adj1 byp1 lt3028 in1 v in1 3.7v to 20v 1 f shdn1 in2 v in2 2.9v to 20v 1 f shdn2 features descriptio u applicatio s u typical applicatio u protected by u.s. patents including 6118263, 6144250. downloaded from: http:///
2 lt3028 3028f t jmax = 125 c, ja = 40 c/ w, jc = 10 c/ w exposed pad (pin 17) is gnd must be soldered to pcb 1615 14 13 12 11 10 9 17 12 3 4 5 6 7 8 adj1shdn1 in1 in1 in2 in2 shdn2 adj2 byp1 nc out1out1 gnd out2out2 byp2 top view dhc package 16-lead (5mm 3mm) plastic dfn (note 1) in1, in2 pin voltage .............................................. 20v out1, out2 pin voltage ....................................... 20v input-to-output differential voltage ....................... 20v adj1, adj2 pin voltage ......................................... 7v byp1, byp2 pin voltage ....................................... 0.6v shdn1, shdn2 pin voltage ................................. 20v output short-circut duration .......................... indefinite consult factory for parts specified with wider operating temperature ranges. absolute axi u rati gs w ww u package/order i for atio uu w lt3028efelt3028ife order part number fe part marking operating junction temperature range (note 2) ............................................ 40 c to 125 c storage temperature range fe package ....................................... 65 c to 150 c dhc package .................................... 65 c to 125 c lead temperature (soldering, 10 sec).................. 300 c t jmax = 150 c, ja = 38 c/ w, jc = 8 c/ w exposed pad (pin 17) is gnd must be soldered to pcb 3028efe3028ife fe package 16-lead plastic tssop 12 3 4 5 6 7 8 top view 1615 14 13 12 11 10 9 gnd byp1 out1out1 gnd out2 byp2 gnd gndadj1 shdn1 in1 in2 shdn2 adj2 gnd 17 lt3028edhclt3028idhc order part number dhc part marking 30283028i parameter conditions min typ max units minimum input voltage output 2, i load = 100ma 1.8 2.3 v (notes 3, 10) output 1, i load = 500ma 1.8 2.3 v adj1, adj2 pin voltage v in = 2v, i load = 1ma 1.205 1.220 1.235 v (notes 3, 4) output 2, 2.3v < v in2 < 20v, 1ma < i load < 100ma 1.190 1.220 1.250 v output 1, 2.3v < v in1 < 20v, 1ma < i load < 500ma 1.190 1.220 1.250 v line regulation (note 3) ? v in = 2v to 20v, i load = 1ma 11 0 m v load regulation (note 3) output 2, v in2 = 2.3v, ? i load = 1ma to 100ma 1 12 mv v in2 = 2.3v, ? i load = 1ma to 100ma 25 mv output 1, v in1 = 2.3v, ? i load = 1ma to 500ma 1 12 mv v in1 = 2.3v, ? i load = 1ma to 500ma 25 mv the denotes specifications which apply over the full operating temperature range, otherwise specifications are t a = 25 c. (note 2) electrical characteristics downloaded from: http:///
3 lt3028 3028f parameter conditions min typ max units dropout voltage i load = 1ma 0.10 0.15 v (output 2) i load = 1ma 0.19 v v in2 = v out2(nominal) i load = 10ma 0.17 0.22 v (notes 5, 6, 10) i load = 10ma 0.29 v i load = 50ma 0.24 0.31 v i load = 50ma 0.40 v i load = 100ma 0.30 0.35 v i load = 100ma 0.45 v dropout voltage i load = 10ma 0.12 0.19 v (output 1) i load = 10ma 0.25 v v in1 = v out1(nominal) i load = 50ma 0.17 0.22 v (notes 5, 6, 10) i load = 50ma 0.32 v i load = 100ma 0.21 0.28 v i load = 100ma 0.34 v i load = 500ma 0.32 0.37 v i load = 500ma 0.47 v gnd pin current i load = 0ma 25 50 a (output 2) i load = 1ma 60 95 a v in2 = v out2(nominal) i load = 10ma 230 400 a (notes 5, 7) i load = 50ma 12 m a i load = 100ma 2.2 4 ma gnd pin current i load = 0ma 30 75 a (output 1) i load = 1ma 65 120 a v in1 = v out1(nominal) i load = 50ma 1 1.6 ma (notes 5, 7) i load = 100ma 23 m a i load = 250ma 58 m a i load = 500ma 10 16 ma output voltage noise c out = 10 f, c byp = 0.01 f, i load = full current, 20 v rms bw = 10hz to 100khz adj1/adj2 pin bias current adj1, adj2 (notes 3, 8) 30 100 na shutdown threshold v out = off to on 0.80 1.4 v v out = on to off 0.25 0.65 v shdn1/shdn2 pin current v shdn1 , v shdn2 = 0v 0 0.5 a (note 9) v shdn1 , v shdn2 = 20v 1 3.0 a quiescent current in shutdown v in = 6v, v shdn1 = 0v, v shdn2 = 0v 0.01 0.1 a ripple rejection v in = 2.72v (avg), v ripple = 0.5v p-p , f ripple = 120hz, 55 65 db i load = full current current limit output 2, v in2 = 7v, v out2 = 0v 500 ma v in2 = 2.3v, ? v out2 = 0.1v 110 ma output 1, v in1 = 7v, v out1 = 0v 1.3 a v in1 = 2.3v, ? v out1 = 0.1v 520 ma input reverse leakage current v in = 20v, v out = 0v 1m a the denotes specifications which apply over the full operating temperature range, otherwise specifications are t a = 25 c. (note 2) electrical characteristics note 1: absolute maximum ratings are those values beyond which the life of a device may be impaired.note 2: the lt3028 regulator is tested and specified under pulse load conditions such that t j t a . the lt3028e is guaranteed to meet performance specifications from 0 c to 125 c junction temperature. specifications over the 40 c to 125 c operating junction temperature range are assured by design, characterization and correlation withstatistical process controls. the lt3028i is guaranteed and tested over the full 40 c to 125 c operating junction temperature range. note 3: the lt3028 is tested and specified for these conditions with the adj1/adj2 pin connected to the corresponding out1/out2 pin. downloaded from: http:///
4 lt3028 3028f typical perfor a ce characteristics uw note 4: operating conditions are limited by maximum junction temperature. the regulated output voltage specification will not apply forall possible combinations of input voltage and output current. when operating at maximum input voltage, the output current range must be limited. when operating at maximum output current, the input voltage range must be limited. note 5: to satisfy requirements for minimum input voltage, the lt3028 is tested and specified for these conditions with an external resistor divider(two 250k resistors) for an output voltage of 2.44v. the external resistor divider will add a 5 a dc load on the output. note 6: dropout voltage is the minimum input to output voltage differential needed to maintain regulation at a specified output current. in dropout, theoutput voltage will be equal to: v in ?v dropout . note 7: gnd pin current is tested with v in = 2.44v and a current source load. this means the device is tested while operating in its dropout regionor at the minimum input voltage specification. this is the worst-case gnd pin current. the gnd pin current will decrease slightly at higher input voltages. total gnd pin current is equal to the sum of gnd pin currents from output 1 and output 2. note 8: adj1 and adj2 pin bias current flows into the pin. note 9: shdn1 and shdn2 pin current flows into the pin. note 10: for the lt3028 dropout voltage will be limited by the minimum input voltage specification under some output voltage/load conditions. seethe curve of minimum input voltage in the typical performance characteristics. electrical characteristics output 2typical dropout voltage output current (ma) 500450 400 350 300 250 200 150 100 50 0 dropout voltage (mv) 3028 g01 0 102030 40 50 60 70 80 90 100 t j = 125 c t j = 25 c output 1typical dropout voltage output current (ma) 500450 400 350 300 250 200 150 100 50 0 dropout voltage (mv) 3028 g02 0 102030 40 50 60 70 80 90 100 t j 125 c t j 25 c = test points temperature ( c) ?0 dropout voltage (mv) 0 50 75 3028 g03 ?5 25 100 125 i l = 100ma i l = 50ma i l = 10ma i l = 1ma 500450 400 350 300 250 200 150 100 50 0 output 2guaranteed dropout voltage output 2 dropout voltage output 1guaranteed dropout voltage output 1 dropout voltage output current (ma) 500450 400 350 300 250 200 150 100 50 0 dropout voltage (mv) 3028 g04 0 50 100 150 200 250 300 350 400 450 500 t j = 125 c t j = 25 c output current (ma) 500450 400 350 300 250 200 150 100 50 0 guaranteed dropout voltage (mv) 3028 g05 0 50 100 150 200 250 300 350 400 450 500 t j 125 c t j 25 c = test points temperature ( c) ?0 dropout voltage (mv) 0 50 75 3028 g06 ?5 25 100 125 500450 400 350 300 250 200 150 100 50 0 i l = 500ma i l = 250ma i l = 100ma i l = 50ma i l = 1ma i l = 10ma downloaded from: http:///
5 lt3028 3028f typical perfor a ce characteristics uw quiescent current (per output) temperature ( c) ?0 quiescent current ( a) 100 3028 g07 05 0 25 25 75 125 5045 40 35 30 25 20 15 10 50 v in = 6v r l = 250k, i l = 5 a v shdn = v in temperature ( c) ?0 adj pin voltage (v) 100 3028 g08 05 0 1.2401.235 1.230 1.225 1.220 1.215 1.210 1.205 1.200 25 25 75 125 i l = 1ma input voltage (v) 0 quiescent current ( a) 4035 30 25 20 15 10 50 16 3028 g09 4 2 6 10 14 18 8 12 20 v shdn = v in t j = 25 c r l = 250k v shdn = 0v adj1 or adj2 pin voltage quiescent current (per output) output 2 gnd pin current input voltage (v) 2.502.25 2.00 1.75 1.50 1.25 1.00 0.75 0.50 0.25 0 gnd pin current (ma) 3028 g10 0123 4 5 67 8910 t j = 25 c *for v out = 1.22v r l = 12.2 ? i l = 100ma* r l = 24.4 ? i l = 50ma* r l = 122 ? i l = 10ma* r l = 1.22k i l = 1ma* output 2gnd pin current vs i load output current (ma) 2.502.25 2.00 1.75 1.50 1.25 1.00 0.75 0.50 0.25 0 gnd pin current (ma) 3028 g11 0 102030 40 50 60 70 80 90 100 v in = v out(nominal) + 1v t j = 25 c output 1 gnd pin current input voltage (v) 12001000 800600 400 200 0 gnd pin current ( a) 3028 g12 0123 4 5 67 8910 r l = 24.4 ? i l = 50ma* r l = 122 ? i l = 10ma* r l = 1.22k i l = 1ma* t j = 25 c v in = v shdn *for v out = 1.22v output 1 gnd pin current output 1gnd pin current vs i load shdn1 or shdn2 pin threshold(on-to-off) input voltage (v) 1210 86 4 2 0 gnd pin current (ma) 3028 g13 0123 4 5 67 8910 r l = 2.44 ? i l = 500ma* r l = 4.07 ? i l = 300ma* r l = 12.2 ? i l = 100ma* t j = 25 c v in = v shdn *for v out = 1.22v output current (ma) 1210 86 4 2 0 gnd pin current (ma) 3028 g14 0 50 100 150 200 250 300 350 400 450 500 v in = v out(nominal) + 1v t j = 25 c temperature ( c) ?0 shdn pin threshold (v) 1.00.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0 50 75 3028 g15 ?5 25 100 125 i l = 1ma downloaded from: http:///
6 lt3028 3028f typical perfor a ce characteristics uw shdn1 or shdn2 pin threshold(off-to-on) temperature ( c) ?0 shdn pin threshold (v) 1.00.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0 50 75 3028 g16 ?5 25 100 125 i l = full i l = 1ma shdn pin voltage (v) 1.00.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 shdn pin input current ( a) 3028 g17 0123 4 5 67 8910 t j = 25 c temperature ( c) ?0 shdn pin input current ( a) 0 50 75 3028 g18 ?5 25 100 125 v shdn = 20v 1.41.2 1.0 0.8 0.6 0.4 0.2 0 shdn1 or shdn2 pin inputcurrent shdn1 or shdn2 pin inputcurrent adj1 or adj2 pin bias current output 2 current limit output 2 current limit temperature ( c) ?0 adj pin bias current (na) 100 9080 70 60 50 40 30 20 10 0 0 50 75 3028 g19 ?5 25 100 125 input voltage (v) 0 short-circuit current (ma) 2 4 5 3028 g20 1 3 6 7 350300 250 200 150 100 50 0 v out2 = 0v t j = 25 c temperature ( c) ?0 current limit (ma) 0 50 75 3028 g21 ?5 25 100 125 350300 250 200 150 100 50 0 v in2 = 7v v out2 = 0v output 1 current limit 1.00.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 input voltage (v) 0 current limit (a) 2 4 5 3028 g22 1 3 6 7 v out1 = 0v t j = 25 c temperature ( c) ?0 current limit (a) 1.21.0 0.8 0.6 0.4 0.2 0 0 50 75 3028 g23 ?5 25 100 125 v in1 = 7v v out1 = 0v output 1 current limit downloaded from: http:///
7 lt3028 3028f typical perfor a ce characteristics uw output 2input ripple rejection frequency (khz) ripple rejection (db) 8070 60 50 40 30 20 10 0 0.01 1 10 1000 3028 g26 0.1 100 i l = 100ma v in2 = 2.3v + 50mv rms ripple c byp = 0 t j = 25 c c out = 10 f c out = 1 f frequency (khz) ripple rejection (db) 8070 60 50 40 30 20 10 0 0.01 1 10 1000 3028 g27 0.1 100 i l = 100ma v in2 = 2.3v + 50mv rms ripple c out = 10 f t j = 25 c c byp = 0.01 f c byp = 1000pf c byp = 100pf output 2input ripple rejection output 2input ripple rejection temperature ( c) ?0 ripple rejection (db) 100 3028 g28 05 0 8070 60 50 40 30 20 10 0 25 25 75 125 v in2 = v out2(nominal) + 1v + 0.5v p-p ripple at f = 120hzi l = 50ma output 1input ripple rejection frequency (hz) ripple rejection (db) 8070 60 50 40 30 20 10 0 10 1k 10k 1m 3028 g29 100 100k i l = 500ma v in1 = v out1(nominal) + 1v + 50mv rms ripple c byp = 0 t j = 25 c c out = 4.7 f c out = 10 f output 1input ripple rejection frequency (hz) ripple rejection (db) 8070 60 50 40 30 20 10 0 10 1k 10k 1m 3028 g30 100 100k i l = 500ma v in1 = v out1(nominal) + 1v + 50mv rms ripple c out = 10 f t j = 25 c c byp = 0.01 f c byp = 100pf c byp = 1000pf output 1 ripple rejection temperature ( c) ?0 ripple rejection (db) 100 3028 g31 05 0 6866 64 62 60 58 56 54 52 25 25 75 125 v in1 = v out1(nominal) + 1v + 0.5v p-p ripple at f = 120hzi l = 500ma output 2 minimum input voltage temperature ( c) ?0 minimum input voltage (v) 2.52.0 1.5 1.0 0.5 0 0 50 75 3028 g32 ?5 25 100 125 i l = 100ma v out2 = 1.22v i l = 50ma temperature ( c) ?0 minimum input voltage (v) 0 50 75 3028 g33 ?5 25 100 125 2.502.25 2.00 1.75 1.50 1.25 1.00 0.75 0.50 0.25 0 i l = 1ma v out1 = 1.22v i l = 500ma output 1 minimum input voltage downloaded from: http:///
8 lt3028 3028f channel-to-channel isolation output 2 load regulation typical perfor a ce characteristics uw temperature ( c) ?0 load regulation (mv) 0 ?? ? ? ? ? ? ? ? ?0 05 0 7 5 3028 g35 ?5 25 100 125 ? i l = 1ma to 100ma output noise spectral density output noise spectral density rms output noisevs bypass capacitor output 2rms output noise vs load current (10hz to 100khz) load current (ma) 0.01 output noise ( v rms ) 160140 120 100 8060 40 20 0 0.1 1 100 10 3028 g40 v out2 set for 5v v out2 set for 5v v out2 =v adj2 v out2 =v adj2 c out2 = 10 f t j = 25 c c byp = 0 c byp = 0.01 f output 1rms output noise vs load current (10hz to 100khz) output 1 load regulation temperature ( c) ?0 load regulation (mv) 100 3028 g36 05 0 25 25 75 125 50 ? ?0 ? i l = 1ma to 500ma frequency (khz) output noise spectral density ( v/ hz) 0.01 1 10 100 3028 g37 0.1 10 1 0.1 0.01 v out set for 5v v out =v adj c out = 10 f c byp = 0 i l = full load t j = 25 c frequency (khz) output noise spectral density ( v/ hz) 0.01 1 10 100 3028 g38 0.1 10 1 0.1 0.01 v out set for 5v v out =v adj c out = 10 f i l = full load t j = 25 c c byp = 1000pf c byp = 100pf c byp = 0.01 f load current (ma) 0.01 output noise ( v rms ) 160140 120 100 8060 40 20 0 0.1 1 3028 g41 10 100 1000 c out1 = 10 f t j = 25 c v out1 set for 5v v out1 set for 5v v out1 = v adj1 v out1 = v adj1 c byp = 0 c byp = 0.01 f frequency (hz) 10 40 channel-to-channel isolation (db) 50 60 70 80 100 1k 1m 10k 100k 3028 g34 30 2010 0 90 100 channel 2 given channel is testedwith 50mvrms signal on opposing channel, both channels delivering full current t j = 25 c channel 1 c byp (pf) 10 80 output noise ( v rms ) 100 120 140 100 1000 10000 3028 g39 6040 20 0 output 2 output 2 v out = 5v v out = 1.22v output 1 output 1 c out = 10 f i l = full load f bw = 10hz to 100khz t j = 25 c v out1 20mv/div v out2 20mv/div c out1 = 22 f50 s/div 3028 g50 c out2 = 10 f c byp1 = c byp2 = 0.01 f ? i l1 = 50ma to 500ma ? i l2 = 10ma to 100ma v in = 6v, v out1 = v out2 = 5v channel-to-channel isolation downloaded from: http:///
9 lt3028 3028f v out 100 v/div c out = 10 f 1ms/div 3028 g42 i l = full load v out set for 5v 10hz to 100khz output noisec byp = 0pf typical perfor a ce characteristics uw v out 100 v/div c out = 10 f 1ms/div 3028 g43 i l = full load v out set for 5v v out 100 v/div c out = 10 f 1ms/div 3028 g44 i l = full load v out set for 5v 10hz to 100khz output noisec byp = 100pf 10hz to 100khz output noisec byp = 1000pf 10hz to 100khz output noisec byp = 0.01 f output 2 transient responsec byp = 0pf v out 100 v/div c out = 10 f 1ms/div 3028 g45 i l = full load v out set for 5v time ( s) 0.20.1 0 0.1 0.2 output voltage deviation (v) 100 50 0 load current (ma) 3028 g46 0 400 800 1200 1600 2000 v in2 = 6v, v out2 set for 5v c in2 = 10 f c out2 = 10 f t j = 25 c time ( s) 0.040.02 0 0.02 0.04 output voltage deviation (v) 100 50 0 load current (ma) 3028 g47 0 40 60 100 20 80 120 140 180 160 200 v in2 = 6v, v out2 set for 5v c in2 = 10 f c out2 = 10 f t j = 25 c output 2 transient responsec byp = 0.01 f output 1 transient responsec byp = 0pf time ( s) 0.40.2 0 0.2 0.4 output voltage deviation (v) 600400 200 0 load current (ma) 3028 g48 0 200 400 600 800 1000 v in1 = 6v, v out1 set for 5v c in1 = 10 f c out1 = 10 f t j = 25 c output 1 transient responsec byp = 0.01 f time ( s) 0.100.05 0 0.05 0.10 output voltage deviation (v) 600400 200 0 load current (ma) 3028 g49 02 03 05 07 09 0 10 40 60 80 100 v in1 = 6v, v out1 set for 5v c in1 = 10 f c out1 = 10 f t j = 25 c downloaded from: http:///
10 lt3028 3028f shdn1/shdn2 (pins 15/10)/(pins 14/11): shutdown. the shdn1/shdn2 pins are used to put the correspond-ing output of the lt3028 regulator into a low power shutdown state. the output will be off when the pin is pulled low. the shdn1/shdn2 pins can be driven either by 5v logic or open-collector logic with pull-up resistors. the pull-up resistors are required to supply the pull-up current of the open-collector gates, normally several mi- croamperes, and the shdn1/shdn2 pin current, typically 1 a. if unused, the pin must be connected to v in . the device will not function if the shdn1/shdn2 pins are notconnected. in1/in2 (pins 13, 14/11, 12)/(pins 13/12): inputs. power is supplied to the device through the in pins. a bypasscapacitor is required on these pins if the device is more than six inches away from the main input filter capacitor. in general, the output impedance of a battery rises with frequency, so it is advisable to include a bypass capacitor in battery-powered circuits. a bypass capacitor in the range of 1 f to 10 f is sufficient. the lt3028 regulator is designed to withstand reverse voltages on the in pins withrespect to ground and the out pins. in the case of a reverse input, which can happen if a battery is plugged in backwards, the device will act as if there is a diode in series with its input. there will be no reverse current flow into the regulator and no reverse voltage will appear at the load. the device will protect both itself and the load. gnd (pins 5, 17)/(pins 1, 5, 8, 9, 16, 17): ground. the exposed pad must be soldered to pcb ground for opti-mum thermal performance. adj1/adj2 (pins 16/9)/(pins 15/10): adjust pin. these are the inputs to the error amplifiers. these pins areinternally clamped to 7v. they have a bias current of 30na which flows into the pin (see curve of adj1/adj2 pinbias current vs temperature in the typical performance characteristics section). the adj1 and adj2 pin voltage is 1.22v referenced to ground and the output voltage range is 1.22v to 20v. byp1/byp2 (pins 1/8)/(pins 2/7): bypass. the byp1/byp2 pins are used to bypass the reference of the lt3028regulator to achieve low noise performance from the regulator. the byp1/byp2 pins are clamped internally to 0.6v (one v be ) from ground. a small capacitor from the corresponding output to this pin will bypass the referenceto lower the output voltage noise. a maximum value of 0.01 f can be used for reducing output voltage noise to a typical 20 v rms over a 10hz to 100khz bandwidth. if not used, this pin must be left unconnected.out1/out2 (pins 3, 4/6, 7)/(pins 3, 4/6): output. the outputs supply power to the loads. a minimum outputcapacitor of 1 f is required to prevent oscillations on output 2; output 1 requires a minimum of 3.3 f. larger output capacitors will be required for applications withlarge transient loads to limit peak voltage transients. see the applications information section for more information on output capacitance and reverse output characteristics. uu u pi fu ctio s (dfn package)/(tssop package) applicatio s i for atio wu uu the lt3028 is a dual 100ma/500ma low dropout regula-tor with independent inputs, micropower quiescent cur- rent, and shutdown. the device is capable of supplying 100ma from output 2 at a dropout voltage of 300mv. output 1 delivers 500ma at a dropout voltage of 320mv. the two regulators have common gnd pins and are thermally coupled, however, the two inputs and outputs of the lt3028 operate independently. they can be shut down independently and a fault condition on one output will notaffect the other output electrically. output voltage noise can be lowered to 20 v rms over a 10hz to 100khz bandwidth with the addition of a 0.01 f reference bypass capacitor. additionally, the reference bypass capacitor willimprove transient response of the regulator, lowering the settling time for transient load conditions. the low oper- ating quiescent current (30 a per output) drops to less downloaded from: http:///
11 lt3028 3028f applicatio s i for atio wu uu figure 1. adjustable operation in1/in2 3024 f01 r2 lt3028 out1/out2 v in v out adj1/adj2 gnd r1 + vv r r ir vv in a a tc output range v to v out adj adj adj =+ ? ? ? ? ? ? + () () = = 122 1 2 1 2 122 30 25 122 20 . . = . than 1 a in shutdown. in addition to the low quiescent current, the lt3028 regulator incorporates several pro-tection features which make it ideal for use in battery- powered systems. the device is protected against reverse input voltages. additionally, in dual supply applications where the regulator load is returned to a negative supply, the output can be pulled below ground by as much as 20v and still allow the device to start and operate. adjustable operation the lt3028 has an output voltage range of 1.22v to 20v. the output voltage is set by the ratio of two external resis- tors as shown in figure 1. the device servos the output to maintain the corresponding adj pin voltage at 1.22v ref- erenced to ground. the current in r1 is then equal to 1.22v/r1 and the current in r2 is the current in r1 plus the adj pin bias current. the adj pin bias current, 30na at 25 c, flows through r2 into the adj pin. the output volt- age can be calculated using the formula in figure 1. thevalue of r1 should be no greater than 250k to minimize errors in the output voltage caused by the adj pin bias current. note that in shutdown the output is turned off and the divider current will be zero. curves of adj pin voltage vs temperature and adj pin bias current vs temperature appear in the typical performance characteristics. the device is tested and specified with the adj pin tied tothe corresponding out pin for an output voltage of 1.22v. specifications for output voltages greater than 1.22v will be proportional to the ratio of the desired output voltage to 1.22v: v out /1.22v. for example, load regulation on output 2 for an output current change of 1ma to 100ma is 1mv typical at v out = 1.22v. at v out = 12v, load regulation is: (12v/1.22v)(?mv) = 9.8mv bypass capacitance and low noise performancethe lt3028 regulator may be used with the addition of a bypass capacitor from v out to the corresponding byp pin to lower output voltage noise. a good quality low leakagecapacitor is recommended. this capacitor will bypass the reference of the regulator, providing a low frequency noise pole. the noise pole provided by this bypass capacitor will lower the output voltage noise to as low as 20 v rms with the addition of a 0.01 f bypass capacitor. using a bypass capacitor has the added benefit of improving transientresponse. with no bypass capacitor and a 10 f output capacitor, a 10ma to 100ma load step on output 2 willsettle to within 1% of its final value in less than 100 s. with the addition of a 0.01 f bypass capacitor, the output will stay within 1% for the same load step. both outputs exhibitthis improvement in transient response (see transient reponse in typical performance characteristics section). however, regulator start-up time is inversely proportional to the size of the bypass capacitor, slowing to 15ms with a 0.01 f bypass capacitor and 10 f output capacitor. output capacitance and transient response the lt3028 regulator is designed to be stable with a widerange of output capacitors. the esr of the output capaci- tor affects stability, most notably with small capacitors. a minimum output capacitor of 1 f with an esr of 3 ? or less is recommended for output 2 to prevent oscillations.a minimum output capacitor of 3.3 f with an esr of 3 ? or less is recommended for output 1. the lt3028 is amicropower device and output transient response will be a function of output capacitance. larger values of output capacitance decrease the peak deviations and provide improved transient response for larger load current changes. bypass capacitors, used to decouple individual components powered by the lt3028, will increase the effective output capacitor value. with larger capacitors downloaded from: http:///
12 lt3028 3028f applicatio s i for atio wu uu used to bypass the reference (for low noise operation),larger values of output capacitors are needed. for 100pf of bypass capacitance on output 2, 2.2 f of output capacitor is recommended. with a 330pf bypass capaci-tor or larger on this output, a 3.3 f output capacitor is recommended. for output 1, 4.7 f of output capacitor is recommended for 100pf of bypass capacitance. with1000pf or larger bypass capacitor on this output, a 6.8 f output capacitor is recommended. the shaded region offigures 2 and 3 define the regions over which the lt3028 regulator is stable. the minimum esr needed is defined by the amount of bypass capacitance used, while the maximum esr is 3 ? . figure 2. output 2 stability output capacitance ( f) 1 esr ( ? ) 4.03.5 3.0 2.5 2.0 1.5 1.0 0.5 0 31 0 3028 f02 24 5 6 78 9 stable region c byp = 330pf c byp = 100pf c byp = 0 c byp > 3300pf output capacitance ( f) 1 esr ( ? ) 4.03.5 3.0 2.5 2.0 1.5 1.0 0.5 0 31 0 3028 f03 24 5 6 78 9 stable region c byp = 330pf c byp 1000pf c byp = 100pf c byp = 0 figure 3. output 1 stability figure 4. ceramic capacitor dc bias characteristics dc bias voltage (v) change in value (%) 3028 f04 20 0 ?0 ?0 ?0 ?0 100 0 4 8 10 26 12 14 x5r y5v 16 both capacitors are 16v,1210 case size, 10 f extra consideration must be given to the use of ceramiccapacitors. ceramic capacitors are manufactured with a variety of dielectrics, each with different behavior across temperature and applied voltage. the most common dielectrics used are z5u, y5v, x5r and x7r. the z5u and y5v dielectrics are good for providing high capacitances in a small package, but exhibit strong voltage and tem- perature coefficients as shown in figures 4 and 5. when used with a 5v regulator, a 10 f y5v capacitor can exhibit an effective value as low as 1 f to 2 f over the operating temperature range. the x5r and x7r dielectrics result inmore stable characteristics and are more suitable for use as the output capacitor. the x7r type has better stability across temperature, while the x5r is less expensive and is available in higher values. temperature ( c) ?0 4020 0 ?0 ?0 ?0 ?0 100 25 75 3028 f05 ?5 0 50 100 125 y5v change in value (%) x5r both capacitors are 16v,1210 case size, 10 f figure 5. ceramic capacitor temperature characteristics downloaded from: http:///
13 lt3028 3028f voltage and temperature coefficients are not the onlysources of problems. some ceramic capacitors have a piezoelectric response. a piezoelectric device generates voltage across its terminals due to mechanical stress, similar to the way a piezoelectric accelerometer or microphone works. for a ceramic capacitor the stress can be induced by vibrations in the system or thermal transients. the resulting voltages produced can cause appreciable amounts of noise, especially when a ceramic capacitor is used for noise bypassing. a ceramic capaci- tor produced figure 6? trace in response to light tapping from a pencil. similar vibration induced behavior can masquerade as increased output voltage noise. applicatio s i for atio wu uu for continuous normal conditions, the maximum junctiontemperature rating of 125 c must not be exceeded. it is important to give careful consideration to all sources ofthermal resistance from junction to ambient. additional heat sources mounted nearby must also be considered. for surface mount devices, heat sinking is accomplished by using the heat spreading capabilities of the pc board and its copper traces. copper board stiffeners and plated through-holes can also be used to spread the heat gener- ated by power devices. the following tables list thermal resistance for several different board sizes and copper areas. all measurements were taken in still air on 3/32" fr-4 board with one ounce copper. table 1. fe package, 16-lead tssop copper area thermal resistance topside* backside board area (junction-to-ambient) 2500mm 2 2500mm 2 2500mm 2 38 c/w 1000mm 2 2500mm 2 2500mm 2 43 c/w 225mm 2 2500mm 2 2500mm 2 48 c/w 100mm 2 2500mm 2 2500mm 2 60 c/w *device is mounted on topside.table 2. dhc package, 16-lead dfn copper area thermal resistance topside* backside board area (junction-to-ambient) 2500mm 2 2500mm 2 2500mm 2 40 c/w 1000mm 2 2500mm 2 2500mm 2 45 c/w 225mm 2 2500mm 2 2500mm 2 50 c/w 100mm 2 2500mm 2 2500mm 2 62 c/w *device is mounted on topside.the thermal resistance junction-to-case ( jc ), measured at the exposed pad on the back of the die is 10 c/w for the dfn package and 8 c/w for the tssop package. calculating junction temperatureexample: given output 1 set for an output voltage of 3.3v, output 2 set for an output voltage of 2.5v, an input voltage range of 3.8v to 5v, an output current range of 0ma to 500ma for output 1, an output current range of 0ma to 100ma for output 2 and a maximum ambient temperature of 50 c, what will the maximum junction temperature be? 100ms/div 3028 f05 v out 500 v/div figure 6. noise resulting from tapping on a ceramic capacitor c out = 10 f c byp = 0.01 f i load = 100ma thermal considerationsthe power handling capability of the device will be limited by the maximum rated junction temperature (125 c). the power dissipated by the device will be made up of twocomponents for each output: 1. output current multiplied by the input/output voltage differential: (i out )(v in ?v out ), and 2. gnd pin current multiplied by the input voltage: (i gnd )(v in ). the ground pin current can be found by examining thegnd pin current curves in the typical performance char- acteristics section. power dissipation will be equal to the sum of the two components listed above. the lt3028 regulator has internal thermal limiting de- signed to protect the device during overload conditions. downloaded from: http:///
14 lt3028 3028f the power dissipated by each output will be equal to: i out(max) (v in(max) ?v out ) + i gnd (v in(max) ) where for output 1: i out(max) = 500ma v in(max) = 5v i gnd at (i out = 500ma, v in = 5v) = 9ma for output 2: i out(max) = 100ma v in(max) = 5v i gnd at (i out = 100ma, v in = 5v) = 2ma so for output 1: p = 500ma (5v ?3.3v) + 9ma (5v) = 0.90w for output 2: p = 100ma (5v ?2.5v) + 2ma (5v) = 0.26w the thermal resistance will be in the range of 35 c/w to 55 c/w depending on the copper area. so the junction temperature rise above ambient will be approximatelyequal to: (0.90w + 0.26w) 50 c/w = 57.8 c the maximum junction temperature will then be equal tothe maximum junction temperature rise above ambient plus the maximum ambient temperature or: t jmax = 50 c + 57.8 c = 107.8 c protection featuresthe lt3028 regulator incorporates several protection features which make it ideal for use in battery-powered circuits. in addition to the normal protection features associated with monolithic regulators, such as current limiting and thermal limiting, the device is protected against reverse input voltages and reverse voltages from output to input. the two regulators have common inputs and gnd pins and are thermally coupled, however, the two outputs of the lt3028 operate independently. they can be shut down independently and a fault condition on one output will not affect the other output electrically. applicatio n s i n for m atio n wu u u current limit protection and thermal overload protectionare intended to protect the device against current overload conditions at the output of the device. for normal opera- tion, the junction temperature should not exceed 125 c. the input of the device will withstand reverse voltages of20v. current flow into the device will be limited to less than 1ma (typically less than 100 a) and no negative voltage will appear at the output. the device will protect both itselfand the load. this provides protection against batteries which can be plugged in backward. the output of the lt3028 can be pulled below ground without damaging the device. if the input is left open circuit or grounded, the output can be pulled below ground by 20v. the output will act like an open circuit; no current will flow out of the pin. if the input is powered by a voltage source, the output will source the short-circuit current of the device and will protect itself by thermal limiting. in this case, grounding the shdn1/shdn2 pins will turn off the device and stop the output from sourcing the short-circuit current. the adj pins can be pulled above or below ground by as much as 7v without damaging the device. if the input is left open circuit or grounded, the adj pins will act like an open circuit when pulled below ground and like a large resistor (typically 100k) in series with a diode when pulled above ground. in situations where the adj pins are connected to a resistor divider that would pull the pins above their 7v clamp voltage if the output is pulled high, the adj pin input current must be limited to less than 5ma. for example, a resistor divider is used to provide a regulated 1.5v output from the 1.22v reference when the output is forced to 20v. the top resistor of the resistor divider must be chosen to limit the current into the adj pin to less than 5ma when the adj pin is at 7v. the 13v difference between output and adj pin divided by the 5ma maximum current into the adj pin yields a minimum top resistor value of 2.6k. downloaded from: http:///
15 lt3028 3028f u package descriptio information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen-tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. fe package 16-lead plastic tssop (4.4mm) (reference ltc dwg # 05-08-1663) exposed pad variation bb in circuits where a backup battery is required, severaldifferent input/output conditions can occur. the output voltage may be held up while the input is either pulled to ground, pulled to some intermediate voltage or is left open circuit. when the in pin of the lt3028 is forced below either out pin or either out pin is pulled above the in pin, input current applicatio n s i n for m atio n wu u u fe16 (bb) tssop 0204 0.09 ?0.20 (.0035 ?.0079) 0 ?8 0.25 ref 0.50 ?0.75 (.020 ?.030) 4.30 ?4.50* (.169 ?.177) 134 5 6 7 8 10 9 4.90 ?5.10* (.193 ?.201) 16 1514 13 12 11 1.10 (.0433) max 0.05 ?0.15 (.002 ?.006) 0.65 (.0256) bsc 2.94 (.116) 0.195 ?0.30 (.0077 ?.0118) typ 2 recommended solder pad layout 0.45 0.05 0.65 bsc 4.50 0.10 6.60 0.10 1.05 0.10 2.94 (.116) 3.58 (.141) 3.58 (.141) millimeters (inches) *dimensions do not include mold flash. mold flash shall not exceed 0.150mm (.006") per side note:1. controlling dimension: millimeters 2. dimensions are in 3. drawing not to scale see note 4 4. recommended minimum pcb metal size for exposed pad attachment 6.40 (.252) bsc for the corresponding regulator will typically drop to lessthan 2 a. this can happen if the input of the device is connected to a discharged (low voltage) battery and the out-put is held up by either a backup battery or a second regu- lator circuit. the state of the shdn1/shdn2 pin will have no effect on the reverse output current when the output is pulled above the input. downloaded from: http:///
16 lt3028 3028f part number description comments lt1129 700ma, micropower, ldo v in : 4.2v to 30v, v out(min) = 3.75v, i q = 50 a, i sd < 16 a, dd, sot-223, s8,to220, tssop20 packages lt1175 500ma, micropower negative ldo guaranteed voltage tolerance and line/load regulation v in : 20v to 4.3v, v out(min) = 3.8v, i q = 45 a, i sd < 10 a, dd,sot-223, s8 packages lt1185 3a, negative ldo accurate programmable current limit, remote sense v in : 35v to 4.2v, v out(min) = 2.40v, i q = 2.5ma, i sd < 1 a, to220-5 package lt1761 100ma, low noise micropower, ldo low noise < 20 v rms, stable with 1 f ceramic capacitors, v in : 1.8v to 20v, v out(min) = 1.22v, i q = 20 a, i sd < 1 a, thinsot package lt1762 150ma, low noise micropower, ldo low noise < 20 v rms, v in : 1.8v to 20v, v out(min) = 1.22v, i q = 25 a, i sd < 1 a, ms8 package lt1763 500ma, low noise micropower, ldo low noise < 20 v rms, v in : 1.8v to 20v, v out(min) = 1.22v, i q = 30 a, i sd < 1 a, s8 package lt1764/lt1764a 3a, low noise, fast transient response, ldo low noise < 40 v rms, "a" version stable with ceramic capacitors, v in : 2.7v to 20v, v out(min) = 1.21v, i q = 1ma, i sd < 1 a, dd, to220 packages ltc1844 150ma, very low drop-out ldo low noise < 30 v rms , stable with 1 f ceramic capacitors, v in : 1.6v to 6.5v, v out(min) = 1.25v, i q = 40 a, i sd < 1 a, thinsot package lt1962 300ma, low noise micropower, ldo low noise < 20 v rms, v in : 1.8v to 20v, v out(min) = 1.22v, i q = 30 a, i sd < 1 a, ms8 package lt1963/lt1963a 1.5a, low noise, fast transient response, ldo low noise < 40 v rms, "a" version stable with ceramic capacitors, v in : 2.1v to 20v, v out(min) = 1.21v, i q = 1ma, i sd < 1 a, dd, to220, sot-223, s8 packages lt1964 200ma, low noise micropower, negative ldo low noise < 30 v rms, stable with ceramic capacitors, v in : 0.9v to 20v, v out(min) = 1.21v, i q = 30 a, i sd < 3 a, thinsot package lt3023 dual 100ma, low noise, micropower ldo low noise < 20 v rms, stable with 1 f ceramic capacitors, v in : 1.8v to 20v, v out(min) = 1.22v, i q = 40 a, i sd < 1 a, ms10e, dfn packages lt3024 dual 100ma/500ma, low noise, low noise < 20 v rms, stable with 1 f ceramic capacitors, micropower ldo v in : 1.8v to 20v, v out(min) = 1.22v, i q = 30 a, i sd < 1 a, dfn, tssop packages lt/tp 0904 1k ?printed in usa ? linear technology corporation 2004 linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com related parts dhc package 16-lead plastic dfn (5mm 3mm) (reference ltc dwg # 05-08-1706) u package descriptio 3.00 0.10 (2 sides) 5.00 0.10 (2 sides) 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package note:1. drawing proposed to be made variation of version (wjed-1) in jedec package outline mo-229 2. drawing not to scale 3. all dimensions are in millimeters 0.40 0.10 bottom view?xposed pad 1.65 0.10 (2 sides) 0.75 0.05 r = 0.115 typ r = 0.20 typ 4.40 0.10 (2 sides) 1 8 16 9 pin 1 top mark (see note 6) 0.200 ref 0.00 ?0.05 (dhc16) dfn 1103 0.25 0.05 pin 1notch 0.50 bsc 4.40 0.05 (2 sides) recommended solder pad pitch and dimensions 1.65 0.05 (2 sides) 2.20 0.05 0.50 bsc 0.65 0.05 3.50 0.05 packageoutline 0.25 0.05 downloaded from: http:///

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